Indian Institute of Technology
Department of Computer Science and Engineering
Navin Government Polytechnic Campus
Patna 800 013
- A-212 (STCS Seminar Room)
There has been considerable interest in Software Transactional Memory in recent years. The reason for rise in STM is due to rise of multicore computers. To fully utilize the power of these machines, applications need to be able to harness the parallelism of the underlying hardware. This is commonly achieved using multi-threading. Yet writing correct and scalable multi-threaded programs is far from trivial. In multi-threaded programs sets of semantically related actions may need to execute in mutual exclusion to avoid semantic inconsistencies.