Sadhana, Academy Proceedings in Engineering Sciences, Indian Academy of Sciences, Bangalore, India is a premier Indian research journal. It regularly publishes special issues on important research topics. In some cases, these are also published as books. Keeping this in view, Sadhana plans to bring out a special issue on Formal Verification, an area that has generated tremendous interest in recent years. The theme of the special issue and the details of submission are given below.

The enormous complexity of hardware and software systems coupled with the extreme short design cycle time has made verification (or checking of correctness) one of the most challenging tasks in computer aided design today. It has been observed that simulation is computationally inadequate to solve the enormously complex problems of both design verification as well as implementation verification. Formal methods seem to be among the most promising approaches to comprehensive system verification today. This special issue of Sadhana is focussed on the topic of Formal Verification of Circuits and Systems to bring out the major issues and technologies, which has captured the imagination of scientists and technologists alike.

Topics related to the theory and practice of computer-assisted formal analysis methods for software and hardware systems are of major interest. These cover theoretical results, modeling and specification formalisms, algorithms and techniques, concrete applications and practical verification tools. Articles can be both original contributions or state of the art surveys on important subtopics. All papers will be reviewed.

Guest Editor:

Dr P. P. Chakrabarti,
Department of Computer Science and Engineering.,
Indian Institute of Technology, Kharagpur
Kharagpur 721302 INDIA


Electronic submissions are encouraged. Postscript or pdf files may be emailed to Alternatively, 6 hard copies are to be posted to the Guest Editor. The last date for submission of a paper is October 31, 2000.

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