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UID:www.tcs.tifr.res.in/event/104
DTSTAMP:20230914T125910Z
SUMMARY:Towards a Portable Execution Model for Extreme Scale Multicore Syst
 ems
DESCRIPTION:Speaker: Vivek Sarkar\nRice University\nDepartment of Computer 
 Science\nP.O. Box 1892\nHouston\, TX 77251\nUnited State\n\nAbstract: \nTh
 e computer industry is at a major inflection point in its hardware roadmap
  due to the end of a decades-long trend of exponentially increasing clock 
 frequencies.  Computer systems anticipated in the 2015 -- 2020 timeframe a
 re referred to as Extreme Scale because they will be built using homogeneo
 us and heterogeneous many-core processors with 100's of cores per chip.  T
 hese systems pose new critical challenges for software in the areas of con
 currency\, energy efficiency and resiliency.  Unlike previous generations 
 of hardware evolution\, this shift towards many-core computing will have a
  profound impact on software.  These software challenges are further compo
 unded by the need to enable parallelism in workloads and application domai
 ns that have traditionally not had to worry about multiprocessor paralleli
 sm in the past.\n\nAn execution model serves a valuable role in providing 
 a shared conceptual view for all stakeholders in a computing platform ecos
 ystem.  Successful execution models from the past (e.g.\, Von Neumann\, ve
 ctor parallelism\, SMP parallelism\, Bulk-Synchronous parallelism) were bu
 ilt on primitives that were well matched with past device\, architecture\,
  and software technology trends\, but are mismatched to future multicore s
 ystems where performance has to be driven by parallelism and constrained b
 y energy.  In this talk\, we identify key primitives that we believe will 
 be necessary for a successful execution model for future extreme scale sys
 tems.  We will discuss the portability of these execution model primitives
  based on their ability to support multiple programming models and their a
 menability to be mapped to a wide range of extreme scale hardware.\n\nWe p
 resent early experiences with these execution model primitives in the Haba
 nero Multicore Software Research project at Rice University which targets 
 mainstream homogeneous and heterogeneous multicore systems\, and discuss f
 uture directions in the context of the NSF Expeditions project on the Cent
 er for Domain-Specific Computing (http://www.cdsc.ucla.edu/) which targets
  embedded systems with an initial focus on the medical imaging domain.  Bo
 th projects takes a two-level approach to programming models\, with a high
 er-level macro-dataflow model based on Intel Concurrent Collections (CnC) 
 for parallelism-oblivious domain experts \, and a lower-level task-paralle
 l model based on the high productivity X10 language for parallelism-aware 
 developers.  We discuss language\, compiler and runtime implementation cha
 llenges that must be overcome to efficiently support these primitives on f
 uture mainstream and embedded multicore systems.\n\nBio: Vivek Sarkar cond
 ucts research in multiple aspects of parallel software including programmi
 ng languages\, program analysis\, compiler optimizations and runtimes for 
 parallel and high performance computer systems.  He currently leads the Ha
 banero Multicore Software Research project at Rice University\, serves as 
 Associate Director of the NSF Expeditions project on the Center for Domain
 -Specific Computing\, and as co-PI on the DARPA-funded project on Platform
 -Aware Compilation Environment (PACE).  Prior to joining Rice in July 2007
 \, Vivek was Senior Manager of Programming Technologies at IBM Research.  
 His responsibilities at IBM included leading IBM's research efforts in pro
 gramming model\, tools\, and productivity in the PERCS project during 2002
 - 2007 as part of the DARPA High Productivity Computing System program.  H
 is past projects include the X10 programming language\, the Jikes Research
  Virtual Machine for the Java language\, the ASTI optimizer used in IBM's 
 XL Fortran product compilers\, the PTRAN automatic parallelization system\
 , and profile-directed partitioning and scheduling of Sisal programs.  Viv
 ek became a member of the IBM Academy of Technology in 1995\, the E.D. But
 cher Professor in Engineering at Rice University in 2007\, and was inducte
 d as an ACM Fellow in 2008.  He holds a B.Tech. degree from the Indian Ins
 titute of Technology\, Kanpur\, an M.S. degree from University of Wisconsi
 n-Madison\, and a Ph.D. from Stanford University. In 1997\, he was on sabb
 atical as a visiting associate professor at MIT\, where he was a founding 
 member of the MIT RAW multicore project.\n\nLINKS:\n\n[1] Habanero Multico
 re Software Research project (http://habanero.rice.edu) \n[2] Habanero Con
 current Collections download (http://habanero.rice.edu/cnc)\n[3] Habanero 
 Java download  (http://habanero.rice.edu/hj)\n[4] Overview article on  Sof
 tware Challenges at Extreme Scale \, \nhttp://www.scidacreview.org/1001/ht
 ml/software.html.\n
URL:https://www.tcs.tifr.res.in/web/events/104
DTSTART;VALUE=DATE:20100721
LOCATION:Lecture Theatre (AG-66)
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