Tata Institute of Fundamental Research

Reconstruction of Depth 3 Arithmetic circuits with constant top fan-in

STCS Seminar
Speaker: Devansh Shringi (University of Toronto)
Organiser: Mrinal Kumar, Raghuvansh Saxena
Date: Tuesday, 12 May 2026, 16:00 to 17:00
Venue: A-201 (STCS Seminar Room)

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Abstract: 
We consider the problem of reconstructing (exact learning) arithmetic circuits given blackbox access to evaluations of the polynomial computed by the circuit. This problem is closely connected to central questions in algebraic complexity, including circuit lower bounds, polynomial identity testing (PIT), and tensor decomposition.The focus of the talk will be on depth-3 circuits with bounded top fan-in and on understanding their structure. We study identities computed by such circuits and analyze the set of constant-codimension subspaces on which these polynomials vanish. These structural insights lead to a quasi-polynomial time algorithm for reconstructing depth-3 circuits with any constant top fan-in. Prior subexponential reconstruction algorithms for this model were known only when the top fan-in is 2 (Sinha '16, '22) or 3 (Saraf-Shringi '25), or when the underlying field is small (Karnin-Shpilka '09).This talk is based on joint work with Shubhangi Saraf and Narmada Varadarajan (https://eccc.weizmann.ac.il/report/2025/222/)(to appear in STOC26).
 
Short Bio : Devansh is a fourth year PhD student at University of Toronto, where he works with Shubhangi Saraf. Before that he was an undergraduate at IIT Kanpur. His research interests are in algebraic complexity, computational complexity, computational algebra \& number theory and pseudorandomness.