Tata Institute of Fundamental Research

New Constructions for Reusable Garbled Circuits

STCS Colloquium
Speaker: Shweta Agrawal (Indian Institute of Technology Department of Computer Science and Engineering Chennai-600036)
Organiser: Piyush Srivastava
Date: Monday, 23 Oct 2017, 14:30 to 15:30
Venue: A-201 (STCS Seminar Room)

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Abstract:  Garbled circuits are a central primitive in cryptography. Intuitively, a garbled circuit enables its holder to evaluate a circuit on an input, so that the evaluator learns the output but learns nothing about the circuit or the input. Garbled circuits are traditionally secure for one time use, i.e. evaluating the circuit on even two inputs completely breaks security. Constructing reusable garbled circuits, that remain secure when evaluated on polynomially many inputs is of both theoretical and practical importance. The first construction for reusable garbled circuits was provided by Goldwasser et al [STOC 2013].

We will present two new constructions for reusable garbled circuits that improve the state of art in many ways. Our constructions will achieve stronger security and will support arithmetic rather than Boolean circuits, which have been the focus of all prior work. The talk will be based on two recent papers by the speaker from Crypto, 17 and the speaker and Rosen from TCC, 17.